Leon Brindley Qualcomm Engineering Internship

Work Experience

Qualcomm Cambridge Internship 2022
  • Pragmatic Logo

    Pragmatic
    Over the summer of 2023 I worked as an IC Design Intern in Pragmatic’s Emerging Applications (EA) Team at Cambridge Science Park for 13 weeks. My internship focused upon the design of both analogue and digital circuits using Cadence Virtuoso and Pragmatic’s Helvellyn PDK for flexible electronics. For example, I designed an accurate and compact SAR ADC containing either an R-2R or resistor-string DAC, along with its accompanying digital SAR logic, analogue comparator and level-shifter, as well as various other layouts.
    July 2023 – September 2023

  • Qualcomm Logo

    Qualcomm
    After loving my first summer internship with Qualcomm, I returned to the Qualcomm Cambridge Power Management Unit Team for a second one! I worked for Qualcomm at Cambridge Business Park for 14 weeks, and learnt so many things throughout. My job included the following tasks, among others:

    • Further IC design (e.g. a low-power, low-area temperature sensor frontend) using Cadence Virtuoso in the Power Management Unit Team, having researched state-of-the-art academic papers through IEEEXplore.

    • Performed various circuit simulations (e.g. DC, transient, safe operating area and Ansys Totem) for Qualcomm’s next-generation voice and music cells, and presented the final results in design review presentations.

    • Created clear and detailed documentation for all designs and tests in accordance with Qualcomm’s standards.

    • Completed an analysis of individual error contributions from Qualcomm’s existing temperature sensor frontend, and how these would be affected by the subsequent signal processing circuitry and ADC.

    • Used Atlassian Confluence/Jira and Microsoft Visio for teamworking and diagram design, respectively.
    June 2022 – September 2022

  • Qualcomm Logo

    Qualcomm
    I’ve completed a 14-week engineering internship with the Power Management Unit Team of Qualcomm Cambridge, as part of my UKESF Scholarship. My job included the following tasks, among others:

    • IC design (e.g. a low-frequency RC oscillator) using Cadence Virtuoso in the Power Management Unit Team.

    • Performed circuit feasibility tests referencing IEEE academic papers and existing Qualcomm IP.

    • Cell layout (e.g. a compact serpentine resistor) development and optimisation.
    June 2021 – September 2021

  • ArC Instruments Logo

    ArC Instruments
    During my 8-week summer internship with ArC Instruments, I developed a program that facilitates RRAM experiments using the ArC ONE® Memristor Characterisation Platform (and its successors) between international partners. The program transmitted data using the User Datagram Protocol (UDP), processed that data in line with my supervisors’ specifications, and communicated the results via UDP also.

    The program contained a GUI to control experimental variables, as well as a dummy module to provide stimuli for future tests. My job included the following tasks, among others:

    • Developed a Python program (with a Qt5 GUI) for UDP-based RRAM experiments using the ArC ONE® Memristor Characterisation Platform.

    • Tested UDP communication using a VPC in Dresden and documented the resultant bit error rate.

    • Presented my work to the Centre for Electronics Frontiers (formerly at the University of Southampton).
    July 2020 – September 2020

  • Pearson Logo

    Extended Project Qualification
    I achieved an A* in an EPQ titled “Will memristor-based neural networks lead to us effectively replicating the human brain’s functionality?”.

    I explored both the hardware functionality of current implementations of memristors (and the efficacy of compounds such as titanium dioxide for this purpose) and the theoretical limits of artificial intelligence.

    Through my EPQ, I investigated whether we can ever pass Alan Turing’s “Imitation Game” and greatly improved my research, citation and critical analysis skills. My dissertation contained over 25,000 words, as well as references to various academic papers and articles.
    January 2018 – January 2019

  • Engineering Education Scheme Logo

    The Engineering Education Scheme
    As part of the Engineering Development Trust’s Engineering Education Scheme, I designed and manufactured a water sampling rig in a team of four. Our project was sponsored by Severn Trent Water Company, and awarded an Industrial Cadets Gold Award.

    I created an electronic timing circuit and programmed it using the PICAXE BASIC programming language, alongside working on the product’s primary pipe system and stand.

    Our assessor from Severn Trent Water stated that we demonstrated an “evolution of a final design well explained and executed”.
    September 2017 – May 2018